Intel® VTune™ Amplifier provides a set of hardware event-based analysis types that help you estimate how effectively your application uses hardware resources. These analysis types monitor hardware events supported by your system's Performance Monitoring Unit (PMU). The PMU is hardware built inside a processor to measure its performance parameters such as instruction cycles, cache hits, cache misses, branch misses and many others.
Note
You can explore raw event database available at https://download.01.org/perfmon.
For more information on Intel® 64 and IA-32 architectures, explore Intel Software Developer Manuals available at http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html.
For details on hardware events supported by your system's PMU, use any of the following options:
When adding new events to your custom configuration, select an event in the Add Events dialog box and explore its short description provided below, or click the Explain button to open the Intel Processor Events Reference for more details:
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For short descriptions of events used for a predefined hardware event-based sampling analysis type, use the Analysis Type window and explore the Events table > Event Description column.
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In the Help Search tab, enter an event name and click Search. The Search tab displays a list of microarchitecture-specific topics containing this event data.
Intel Processor Event Reference provides an event database for the following Intel microarchitectures:
- Events for Intel(R) Microarchitecture Code Name Bonnel
- Events for Intel(R) Microarchitecture Code Name Nehalem EX
- Events for Intel(R) Microarchitecture Code Name Nehalem EP
- Events for Intel(R) Microarchitecture Code Name Westmere EX
- Events for Intel(R) Microarchitecture Code Name Westmere EP-SP
- Events for Intel(R) Microarchitecture Code Name Westmere EP-DP
- Events for Intel(R) Microarchitecture Code Name Sandy Bridge
- Events for Intel(R) Microarchitecture Code Name Sandy Bridge EP
- Events for Intel(R) Microarchitecture Code Name Ivy Bridge
- Events for Intel(R) Microarchitecture Code Name Ivy Bridge EP
- Events for Intel(R) Microarchitecture Code Name Haswell
- Events for Intel(R) Microarchitecture Code Name Haswell X
- Events for Intel(R) Microarchitecture Code Name Broadwell
- Events for Intel(R) Microarchitecture Code Name Skylake
- Events for Intel(R) Microarchitecture Code Name Silvermont
- Events for Intel(R) Microarchitecture Code Name Airmont
- Events for Intel(R) Xeon Phi(TM) Coprocessor (Code Name: Knights Corner)